1. Field of the Invention
The invention relates to a high power semiconductor switching device for use in self commutated resonant invertors. More particularly, the invention relates to a MOS control thyristor which employs a high current fast recovery commutating diode and gate protection devices in a single surface mounted package which provides thermal and parasitic loss management.
2. Description of the Prior Art
A MOS Controlled Thyristor (MCT) is a new high power semiconductor switching device which combines the best features of SCR thyristors and power MOSFETs. The MCT has the ability of the SCR to pass extremely large currents with only a small voltage drop, but is controlled by a capacitive MOSFET gate. The MCT is made using standard MOSFET processes, but has an additional PN junction at the base of the chip to form a PNPN thyristor. The surface of the chip is covered with a large number of N and P channel cells which control the chip, effectively dividing it into a large number of very small thyristors connected in parallel.
The basic operation of the device can be understood by considering the equivalent circuit of an MCT 10 in FIG. 1. The thyristor portion of the MCT is replaced by two bipolar transistors 12 and 14 and a pair of respective P and N channel MOSFETs 16 and 18. The anode 20 is at a positive voltage with respect to the cathode 22. The collector current of PNP transistor 12 drives the base of the NPN transistor 14, and vice versa.
Once current starts to flow through the device 10, the two transistors 12 and 14 drive each other and the device latches on. The P channel MOSFET 16, connected between the emitter of the PNP 12 (MCT anode 20) and the base of the NPN 14, provides a small amount of base drive to turn the device on when the gate 24 is negative with respect to anode 20. The N channel MOSFET 18, between the base and emitter of the PNP 14, shorts out the base drive when the gate 24 is positive with respect to anode 20, turning the device 10 off.
The primary shortcoming of the MCT 10 is that if the current is too large when the device is commanded off, the current will concentrate in a few cells, causing local heating and perhaps device failure. This restriction is analogous to the Safe Operating Area (SOA) associated with bipolar devices.
The aforementioned shortcoming does not alter the fact that the MCT 10 is ideally suited for use in high power self commutated resonant invertors. In this type of inverter, relatively high peak currents must be passed with a small voltage drop while the device is turned off by the resonant circuit with essentially zero voltage and current. This application capitalizes on the strengths of the MCT, while neutralizing its weaknesses.
In order to make full use of the MCT the device must be in a package which provides adequate thermal management, low loss, high current interconnections, minimal parasitic inductances and resistances, and small size. None of the packages normally used with power semiconductor devices meet all of these requirements.
The MCT 10 is presently normally packaged as a chip 28 which is solder mounted on a metal substrate 29 and encapsulated in an insulating plastic 30 forming a known TO-220 package 31. The package 31 has an aperture 32 therein and is secured to a metal support 33 by means of a fastener (not shown) which passes through the aperture 32. An insulting wafer 34 is disposed between the substrate 29 and the support 33. The wafer 34, typically a ceramic material such as BeO, provides electrical insulation but also adds thermal resistance to the package 31. This is undesirable because, in some applications, peak currents of 300 amperes are required and existing thermal paths are insufficient for adequately dissipating heat produced by such high currents. Also, large currents are concentrated in a number of thin anode bond wires 35, which couple the chip 28 to package leads 36 and small external leads 37, are soldered to the package leads 36. Concentration of high currents results in undesirably high electrical parasitics.
The parasitic elements which arise in the physical construction of a circuit can be critical in high power applications. The parasitics which are of prime concern are lead resistances and lead inductances. FIG. 3 illustrates an equivalent circuit for MCT 10 shown in FIG. 1 in which a commutating diode 42 is coupled across the MCT 10 in an antiparallel configuration. That is, the anode 44 of the diode 42 is coupled to the cathode 22 of the MCT and vice versa.
In the arrangement illustrated, it will be assumed that all significant parasitic inductances are noted by the symbol L followed by a reference numeral. Likewise, all significant parasitic resistances are noted by the symbol R followed by a reference numeral. When relevant the associated reference numeral is mentioned. Each high power, high frequency lead wire has both parasitic inductance and resistance. These parasitics are especially troublesome and cause the greatest losses. Each low power, high frequency lead wire has both parasitic inductance and resistance. However, at low power, the resistance has a negligible effect on thermal losses, thus, such parasitics are ignored.
L1 and L2 are parasitics associated with the anode and cathode connections of the package. Likewise, R1 and R2 are anode and cathode parasitics associated with the package leads. L3 and L4 are inductive parasitics associated with the lead wires of the MCT 10. Similarly, R3 and R4 are parasitic resistances associated with the device lead wires. L5 and L6 and R5 and R6 are parasitics associated with the lead wires of the antiparallel commutating diode 40. L7 and L8 are parasitic inductances associated with the Kelvin and gate leads, which are low power. Accordingly, parasitic resistances are ignored for these leads.
Large high frequency currents flow from the anode 20 to the cathode 22. Accordingly, any lead contact or resistance R in this path translates directly into power dissipation of about 10 watts per milliohm. This is additional heat which must be removed from the device. The problem is further complicated because high frequency currents tend to flow on the outer surface of conductors, penetrating less than 10 mils. This phenomenon increases the apparent resistance of the conductor.
The parasitic inductances L between elements have the potential to directly result in device failure. While the MCT 10 has a forward blocking capability of over 500 volts, reverse voltages of less than 10 volts can destroy the device. For this reason, the antiparallel commutating diode 42 is required in virtually all applications. Also shown in FIG. 3 is a gate protection feature in the form of back-to-back zener diodes 48 coupled between the gate lead 24 and Kelvin lead 46.
The ability of the diode 42 to limit the reverse voltage on the MCT 10 is restricted by any inductance between the two devices. With a rate of current rise of 500 amps per microsecond, as little as 20 nanohenries of stray inductance can cause device failure. Referring to FIG. 2, the inductance of any one of the bond wires 33 is nearly 10 nanohenries. A similar problem exists with the voltage between the gate 24 and the anode 20 across gate inductance R7, but this problem is partially resolved by the addition of Kelvin connection 46 to serve as gate return.
The package 31 in FIG. 2 is clearly not adequate for the intended applications. Unfortunately, other packages normally used with power devices are little better. For example, known packages such as the TO-3, T-257 and Z-Pack fail on both thermal and high current criteria. Thermal performance is particularly degraded by the use of the voltage isolating ceramic substrate 34 which separates the package 31 from the metal support 33. Resistive losses are increased because even when multiple anode bond wires 33 are employed, current is forced to concentrate into small package leads or pins 36 which can only be connected externally to small lead wires 37, (e.g., AWG #16) through solder joints. Furthermore, since these are single chip packages, the required low inductance between MCT 10 and diode 42 is difficult to achieve.
Conventional power hybrids and modules can provide the required thermal performance and low inductance interconnections between the MCT 10 and diode 42, but cannot pass high currents to the external circuits with acceptable losses, because current is still concentrated through the small pins 36. Known hockey puck packages used with high power SCRs provide excellent cooling, and low loss, low inductance connections, but are far too bulky for the intended applications, and are generally not applicable to a chip as physically as small as the MCT 10.